21. Temporal Logic In Information Systems temporal logic in Information Systems. Jan Chomicki David Toman. Abstract Temporallogic is obtained by adding temporal connectives to a logic language. http://www.brics.dk/LS/97/1/

Temporal Logic in Information Systems Jan Chomicki David Toman November 1997 Abstract: Temporal logic is obtained by adding temporal connectives to a logic language. Explicit references to time are hidden inside the temporal connectives. Different variants of temporal logic use different sets of such connectives. In this chapter, we survey the fundamental varieties of temporal logic and describe their applications in information systems. Several features of temporal logic make it especially attractive as a query and integrity constraint language for temporal databases. First, because the references to time are hidden, queries and integrity constraints are formulated in an abstract, representation-independent way. Second, temporal logic is amenable to efficient implementation. Temporal logic queries can be translated to an algebraic language. Temporal logic constraints can be efficiently enforced using auxiliary stored information. More general languages, with explicit references to time, do not share these properties. Recent research has proposed various implementation techniques to make temporal logic practically useful in database applications. Also, the relationships between different varieties of temporal logic and between temporal logic and other temporal languages have been clarified. We report on these developments and outline some of the remaining open research problems.

22. Angelo Montanari Home Page University of Udine Logical specifications of real-time systems, temporal and object-oriented databases, deductive databases, temporal representation and reasoning, modal and temporal logic, set theory. http://www.dimi.uniud.it/~montana/index.html

Angelo Montanari Associate Professor Deputy Head of the Department of Mathematics and Computer Science University of Udine via delle Scienze 206 33100 Udine - UD - Italy e-mail: montana@dimi.uniud.it http://www.dimi.uniud.it/~montana phone: ++39 0432 55-8477 fax: ++39 0432 55-8499 Office: Room SN14 Biographical Sketch Date of Birth : November 14, 1962 Place of Birth : Sacile, Italy Citizenship: Italian Marital Status : Married, with 3 children Knowledge of foreign languages : English Education M.Sc. in Computer Science, University of Udine, April 1987, thesis : ``A distributed architecture for natural language processing. Quantification and reference'', under the supervision of Prof. Giovanni Guida. The thesis received a prize from IBM Italia as one of the best theses in computer science of the 1987. Ph.D. in Logic and Computer Science, University of Amsterdam, September 1996, thesis: ``Metric and Layered Temporal Logic for Time Granularity'', under the supervision of Prof. Johan van Benthem, University of Amsterdam and University of Stanford, and Prof. Alberto Policriti, University of Udine. Occupations 1987-1988 : Civil Service 1989-1991 : researcher at CISE - Tecnologie Innovative, Milano, Artificial Intelligence and Software Engineering Group. During this period, he was involved in national (CNR Project on Informatic Systems and Parallel Computation) and international (ESPRIT Project n. 2409 EQUATOR: an Environment for QUAlitative and TempOral Reasoning) research projects

23. Simin Nadjm-Tehrani Link¶ping University Formal methods in verification of real-time and embedded systems, including discrete and hybrid models, applications of temporal logic, symbolic model checking, automata-based decompositional proof techniques. http://www.ida.liu.se/~snt/

Linköpings universitet Department of Computer and Information Science Real-Time Systems Lab Email: simin@ida.liu.se Phone: Fax: Office: Building B, First floor, Room 3B:442-444 Real-time Systems Laboratory (RTSLAB) Department of Computer and Information Science Simin Nadjm-Tehrani is the Director of Real-time Systems Laboratory (RTSLAB) since January 2000. formal analysis of safety and fault-tolerance in safety-critical systems system availability: support for fault-tolerance in middleware survivability in critical infrastructures using self-healing agents formal verification of hybrid (discrete-continuous) models Her main interests within the field of education are: curriculum design problem-based learning (PBL) authentic examination forms women in computer science Details of current activities and publications can be found on the RTSLAB web pages Last modified on Friday January 24, 2003 by Simin Nadjm-Tehrani

24. Kono's Temporal Logic Related Information The summary for this Japanese page contains characters that cannot be correctly displayed in this language/character set. http://rananim.ie.u-ryukyu.ac.jp/~kono/temporal-logic.html

»þ¶è´Ö»þÁêÏÀÍý(Interval Temporal Logic)¤ò»È¤¤¿¤µ¤Þ¤¶¤Þ¤Ê¥×¥í¥¸¥§¥¯¥È ¤Ë´Ø¤¹¤ë¥Ú¡¼¥¸¤Ç¤¹¡£ English Page is here Tokio-9.94 Interval Temporal Logic ¤ò»È¤¤¿¥×¥í¥°¥é¥ß¥ó¥°¥Ä¡¼¥ë Tokio Programming Language RTL-Tokio Piplelined CPU verification tool LITE Intervale Temporal Logic Verifier TEMPORAL LOGIC PROGRAMMING LANGUAGE Tokio Shinji Kono, Tatsuya Aoyagi, Masahiro Fujita, Hidehiko Tanaka, Tatsuhiko Moto-oka September 1984 Logic Programming Conference Tokio: Logic Programming Language Based on Temporal Logic and Its compilation to Prolog Masahiro Fujita, Shinji Kono, Hidehiko Tanaka, Tatsuhiko Moto-oka September 1986 Internatinal Conference on Logic Programming Automatic Verification of Interval Temporal Logic Shinji Kono TM-92-007, SONYCSL March 1992 8th British Colloquium For Theoretical Computer Science October 1992 Âè9²ó¡Öµ­¹æÏÀÍý³Ø¤È¾ðÊó²Ê³Ø¡×¸¦µæ½¸²ñ Synthesis of Contrllers from Interval Temporal Loigc Specification Masahiro Fujita Shinji Kono TR-93-11, SONYCSL October May, 1993 International Workshop on Logic Synthesis A Combination of Clasual and Non Clausal Temporal Logic Program Shinji Kono TR-93-12, SONYCSL October Aug, 1993 IJCAI-93 Workshop on Executable Modal and Temporal Logics

25. Theoretical Computer Science - Faculty Institute of Mathematical Sciences, Chennai Theory of distributed systems, temporal logics, Partial order models of concurrency, Logics of knowledge. http://www.imsc.ernet.in/~jam/

R. Ramanujam Research interests : Theory of distributed systems: Temporal logics Partial order models of concurrency Logics of knowledge Some papers: Paul Krasucki and R.Ramanujam, Knowledge and the ordering of events in distributed systems, Proc. Theoretical Aspects of Reasoning about Knowledge, Morgan Kaufmann, 1994, 267-283. Click here for gzipped-.ps file R.Ramanujam, Knowledge and the next state modality, Proc. Indian National Seminar in TCS, 1994, 62-80. Click here for gzipped-.ps file Kamal Lodaya, Rohit Parikh, R.Ramanujam and P.S.Thiagarajan, A logical study of distributed transition systems, Information and Computation, Vol 119, No. 1, 1995, 91-118. R. Ramanujam, Local knowledge assertions in a changing world, Proc. Theoretical Aspects of Rationality and Knowledge, Morgan Kaufmann, 1996, pp 1-17. Click here for gzipped-.ps file R. Ramanujam, Locally linear time temporal logic, Proc. IEEE Logic in Computer Science, New Jersey, 1996, pp 118-127. Click here for gzipped-.ps file R. Ramanujam, Trace consistency and inevitability, Proc. FST and TCS, Hyderabad, 1996, Springer LNCS 1180, pp 250-261. Click here for gzipped-.ps file

26. SRI International - Computer Science Laboratory - Ground Temporal Logic: A Logic Publications Ground temporal logic A Logic for Hardware Verification by DavidCyrluk and Paliath Narendran. Lecture Notes in Computer Science, Volume 818. http://www.csl.sri.com/papers/cav94/

Computing Sciences Computer Science Laboratory Contact People ... Jobs Publications Ground Temporal Logic: A Logic for Hardware Verification by David Cyrluk and Paliath Narendran Lecture Notes in Computer Science, Volume 818. From Computer-Aided Verification (CAV '94) Edited by David Dill. Springer-Verlag, Stanford, CA. June, 1994. Abstract: We present a new temporal logic, GTL, appropriate for specifying properties of hardware at the register transfer level. We argue that this logic represents an improvement over model checking for some natural hardware verification problems. We show that the validity problem for this logic is Pi 1-1 complete. We then identify a fragment of the logic that is decidable. We show that in this fragment we are still able to encode many interesting problems, including the correctness of pipelined microprocessors. BibT E X entry: http://www.csl.sri.com/papers/cav94/ Download: cav94.ps.gz Compressed PostScript Home About Us Working with SRI Careers ... News

27. Research Papers University of Edinburgh Models and calculi for concurrent computation, modal and temporal logics with fixed points, verification and description of program properties. http://www.dcs.ed.ac.uk/~cps/

Colin Stirling Research Interests Models and calculi for concurrent computation, modal and temporal logics with fixed points and their applications to verification and description of program properties. Tools for Concurrency, the Edinburgh Concurrency Workbench Books Edited Plotkin, Stirling, Tofte Proof, Language, and Interaction Essays in Honour of Robin Milner MIT Press, 2000 Modal and Temporal Properties of Processes Springer (Texts in Computer Science), 2001 Recent Papers Deciding DPDA equivalence is primitive recursive ICALP 2002 Lecture Notes in Computer Science Longer draft paper With M. Lange Model checking fixed point logic with chop FOSSACS 2002 Lecture Notes in Computer Science Bisimulation and language equivalence To appear in "Logic for Concurrency and Synchronisation" Volume in Kluwer series "Trends in Logic" With M. Lange Model checking games for branching time logics Journal of Logic and Computation An introduction to decidability of DPDA equivalence FSTTCS 2001 (invited talk) Lecture Notes in Computer Science Decidability of DPDA equivalence Theoretical Computer Science With C. Morvan

28. TemporalRover Provides automatic verification of protocols and reactive systems through temporal logic specifications. http://www.time-rover.com/

RunTime Verification Safety Critical Systems Temporal Business Rule Checking Specification based Exception Handling RunTime Verification Safety Critical Systems Temporal Business Rule Checking Specification based Exception Handling ... Temporal Requirement Simulation

29. Citations: The Temporal Logic Of Reactive And Concurrent Systems - Manna, Pnueli Z. Manna and A. Pnueli. The temporal logic of Reactive and Concurrent Systems. Thetemporal logic of Reactive and Concurrent SystemsSpecification. http://citeseer.nj.nec.com/context/9751/0

931 citations found. Retrieving documents... Z. Manna and A. Pnueli. The Temporal Logic of Reactive and Concurrent Systems-Specification . Springer-Verlag, 1992. Home/Search Document Not in Database Summary Related Articles Check This paper is cited in the following contexts: First 50 documents Next 50 A Theory for Composing Distributed - On (Correct) ....fairness, Q can go back and forth indefinitely between states in J 1 #J 2 and J 1 J 2 and this can block P s progress to q. In For these we refer the reader to standard textbooks, e.g. Some adjustments, however, to these laws are needed to cope with the J and the V parameters. The reformulation of some commonly used UNITY laws [5] is given in Appendix A. 3.7 The J Parameter: Stable or Invariant If the reader is familiar with the Sanders work [21] he or she might recognize .... ....the HOL proof scripts are available at request. The semantics we will give here is a UNITY like semantics. UNITY is an elegant and simple programming theory introduced by Chandy and Misra in 1988 [5] to reason about distributed systems. UNITY is an axiomatic logic, unlike, for example, LTL

30. Citations: The Temporal Logic Of Programs - Pnueli (ResearchIndex) Similar pages More results from citeseer.nj.nec.com developerWorks Java technology Diagnosing Java code One way to fill this gap is with temporal logic, a formalism usedto describe how a program state will change over time. In this http://citeseer.nj.nec.com/context/18303/0

384 citations found. Retrieving documents... A. Pnueli. The Temporal Logic of Programs Home/Search Document Not in Database Summary Related Articles Check This paper is cited in the following contexts: First 50 documents Next 50 Design Validation of ZCSP with SPIN - Differents Models And (Correct) through typed bu ered channels, through shared variablesorany combination of these [4] SPIN accepts design speci cations written in the veri cation language ProMeLa (a Process Meta Language) and it accepts correctness claims speci ed in the syntax of standard Linear Temporal Logic (LTL) The result is again a B uchi .... A. Pnueli. The Temporal Logic of Programs Software Tools for Technology Transfer manuscript iNTo. - Will Be Inserted (Correct) ....written in high level logics by users of the system. Logics are currently imple mented in Maude [6] a high performance system sup porting both rewriting logic and membership equational logic. One can naturally and easily define new logics in Maude, such as for example temporal logics , to gether with their finite trace operational semantics.

31. DeveloperWorks: Java Technology : Diagnosing Java Code: Using Temporal Logic Wit temporal logic is a formalism used to describe how a program state will changeover time. Diagnosing Java code Using temporal logic with bug patterns, http://www-106.ibm.com/developerworks/java/library/j-diag0827.html?dwzone=java

32. Dept. Of AI: Alumni University of Ulm Object-oriented approaches to formal specification and verification, formal specification and verification of reactive systems, component-based formal development of concurrent systems, and the temporal logic of Actions. http://www.informatik.uni-ulm.de/ki/canver.html

University of Ulm Faculty of Computer Science Dept. of Artificial Intelligence back: Staff Former Members Alumni Ercüment Canver Ercuement .Canver @icn. siemens.de joined Siemens AG, Ulm Daniela Damm damm@ifi.unizh.ch Dr. Axel Dold dold@tescom.de or axel.dold@gmx.de joined TESCOM GmbH, Ulm Andrea Hemprich hemprich@io-software.com joined IO Software, Freiburg Martin Hiller Martin.Hiller@t-systems.de joined T-Systems/Debis, Ulm Alke Martens ... alke.martens@informatik.uni-rostock.de joined Univ. of Rostock Prof. Dr. Bernhard Nebel nebel@informatik.uni-freiburg.de joined Univ. of Freiburg Stephan Pfab spf@pc-plus.de Dr. Harald ruess@csl.sri.com joined SRI International, Menlo Park, CA Dr. Jussi Rintanen rintanen@informatik.uni-freiburg.de joined Univ. of Freiburg Detlef Schwier detlef@blaxxun.de joined blaxxun interactive, München Dr. Martin Strecker Martin.Strecker@in.tum.de joined TU München Dirk Tyschler Dirk.Tyschler@gmx.net joined Bayer AG, Leverkusen Petra Tyschler Petra.Tyschler@gmx.net joined Allianz AG, Stuttgart Prof. Dr. Adelinde

33. Citation ACM Transactions on Programming Languages and Systems (TOPLAS) archive Volume 16, Issue 3 (May 1994) toc The temporal logic of actions Author Leslie Lamport http://portal.acm.org/citation.cfm?id=177726&dl=ACM&coll=portal&CFID=11111111&CF

34. Results Search Results. Nothing Found. Your search for temporal logic IN CCS did notreturn any results. temporal logic CCS Advanced Search Search Help/Tips. http://portal.acm.org/results.cfm?query=Temporal logic CCS&coll=portal&dl=A

35. Temporal Logic In Specification 1987 dblp.unitrier.de temporal logic in Specification 1987 Altrincham, UK. 1-20;Shmuel Katz, Doron Peled Interleaving Set temporal logic. http://www.informatik.uni-trier.de/~ley/db/conf/tls/tls1987.html

Temporal Logic in Specification 1987: Altrincham, UK Behnam Banieqbal Howard Barringer Amir Pnueli (Eds.): Temporal Logic in Specification, Altrinchamm UK, April 8-10, 1987, Proceedings. Lecture Notes in Computer Science 398 Springer 1989, ISBN 3-540-51803-7 DBLP Logic Colin Stirling : Comparing Linear and Branching Time Temporal Logics. 1-20 Shmuel Katz Doron Peled : Interleaving Set Temporal Logic. 21-43 Susanne Graf Joseph Sifakis : An Expressive Logic for a Process Algebra with Silent Actions. 44-61 Behnam Banieqbal Howard Barringer : Temporal Logic with Fixed Points. 62-74 Automata, Theorem Proving and Model Checking Pierre Wolper : On the Relation of Programs and Computations to Models of Temporal Logic. 75-123 Zohar Manna Amir Pnueli : Specification and Verification of Concurrent Programs by forall-Automata. 124-164 Bernhard Josko : MCTL - An Extension of CTL for Modular Verification of Concurrent Systems. 165-187 Edmund M. Clarke Orna Grumberg : The Model Checking Problem for Concurrent Systems with Many Similar Processes. 188-201 Moshe Y. Vardi

36. International Conference On Temporal Logic 1994 Dov M. Gabbay, Hans Jürgen Ohlbach (Eds.) temporal logic, First InternationalConference, ICTL '94, Bonn, Germany, July 1114, 1994, Proceedings. http://www.informatik.uni-trier.de/~ley/db/conf/ictl/ictl1994.html

ICTL 1994: Bonn, Germany Dov M. Gabbay (Eds.): Temporal Logic, First International Conference, ICTL '94, Bonn, Germany, July 11-14, 1994, Proceedings. Lecture Notes in Computer Science 827 Springer 1994, ISBN 3-540-58241-X DBLP Odd Erik Hansen : Combining Temporal Specification Techniques. 1-16 Shmuel Katz : Global Equivalence Proofs for ISTL. 17-29 Jos C. M. Baeten Jan A. Bergstra Roland N. Bol : A Real Time Process Logic. 30-47 T. S. E. Maibaum : Sometimes "Tomorrow" is "Sometime" - Action Refinement in a Temporal Logic of Objects. 48-66 Anthony J. Bonner Michael Kifer : Applications of Transaction Logic to Knowledge Representation. 67-81 Patrick Doherty Witold Lukaszewicz : Cicumscribing Features and Fluents. 82-100 Silvana Badaloni Marina Berati : Dealing with Time Granularity in a Temporal Planning System. 101-116 M. Reynolds : Axiomatizing U and S over Integer Time. 117-132 Valentin Goranko : Temporal Logic with Reference Pointers. 133-148 Yde Venema : Completeness through Flatness in Two-Dimensional Temporal Logic. 149-164 Bart Vergauwen Johan Lewi I. Avau

37. The Temporal Logic Of Actions A logic for specifying and reasoning about concurrent systems. http://www.research.digital.com/SRC/tla/

38. Temporal Logic From FOLDOC temporal logic. logic An extension There are two types of temporal logicused branching time and linear time. The basic propositional http://wombat.doc.ic.ac.uk/foldoc/foldoc.cgi?temporal logic

39. SRI International - Computer Science Laboratory - Ground Temporal Logic: A Logic A temporal logic designed to specify properties of hardware at the register transfer level. http://www.csl.sri.com/reports/html/cav94.html

Computing Sciences Computer Science Laboratory Contact People ... Jobs Publications Ground Temporal Logic: A Logic for Hardware Verification by David Cyrluk and Paliath Narendran Lecture Notes in Computer Science, Volume 818. From Computer-Aided Verification (CAV '94) Edited by David Dill. Springer-Verlag, Stanford, CA. June, 1994. Abstract: We present a new temporal logic, GTL, appropriate for specifying properties of hardware at the register transfer level. We argue that this logic represents an improvement over model checking for some natural hardware verification problems. We show that the validity problem for this logic is Pi 1-1 complete. We then identify a fragment of the logic that is decidable. We show that in this fragment we are still able to encode many interesting problems, including the correctness of pipelined microprocessors. BibT E X entry: http://www.csl.sri.com/papers/cav94/ Download: cav94.ps.gz Compressed PostScript Home About Us Working with SRI Careers ... News

40. No Match For Linear Temporal Logic No match for Linear temporal logic. Sorry, the term Linear temporal logicis not in the dictionary. Check the spelling and try removing http://wombat.doc.ic.ac.uk/foldoc/foldoc.cgi?Linear Temporal Logic

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