Product Description
The Verilog Programming Language Interface is a powerfulfeature of the Verilog standard. Through this interface, a Verilogsimulator can be customized to perform virtually any engineering taskdesired, such as adding custom design debug utilities, addingproprietary file read/write utilities, and interfacing bus functionalC language models to a simulator. This book serves as both a user's guide for learning the Verilog PLI,and as a comprehensive reference manual on the Verilog PLI standard.Both the TF/ACC ("PLI 1.0") and the VPI ("PLI 2.0") generations of thePLI are presented, based on the IEEE 1364 Verilog standard. The secondedition of this book adds detailed coverage of the many enhancementsadded in the latest IEEE 1364-2001 Verilog standard ("Verilog-2001").

A CD is included, with the C source code, Verilog HDL test cases andsimulation result logs for more than 75 complete PLI examples. ... Read more

Customer Reviews (5)

Was the best reference I could find for PLI
I needed to write some test benches and JTAG drivers for a reconfigurable product.At the time I had little experience with Verilog/RTL I elected to write it in PLI.I could NOT have completed this task without this reference.I searched for the most complete book and found this to be just that.The most complete reference.

great book & great service
The book is brand new and is wrapped very carefully. Thanks to the sender for such good care. it was shipped on time.

The right tool for the job.
This book is a must have, if you are writing PLI applications for any Verilog simulator. If you don't need to do that, then, well the book isn't for you.If you do, the price is very cheap, considering the time savingsyou will realize.

Clear explanations with good examples.
Very good coverage of a difficult topic.Well written and easy to understand.A must if you are doing PLI work!

Excellent descriptions and examples of Verilog PLI
This book brings clarity to the Verilog Programming Language Interface. The descriptions and examples shed new light on aspects of the PLI that had previously been murky.Stuart Sutherland has produced the definitive guideto all versions of the PLI.I highly recommend this book to all Verilogusers who want to learn the PLI.The first time you use an example fromthe book, you will save hours compared to flipping through the IEEE manual. ... Read more

Product Description
Advances in semiconductor technology continue to increase the power and complexity of digital systems. To design such systems requires a strong knowledge of Application Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs), as well as the CAD tools required. Hardware Description Language (HDL) is an essential CAD tool that offers designers an efficient way for implementing and synthesizing the design on a chip. HDL Programming Fundamentals: VHDL and Verilog teaches students the essentials of HDL and the functionality of the digital components of a system. Unlike other texts, this book covers both IEEE standardized HDL languages: VHDL and Verilog. Both of these languages are widely used in industry and academia and have similar logic, but are different in style and syntax. By learning both languages students will be able to adapt to either one, or implement mixed language environments, which are gaining momentum as they combine the best features of the two languages in the same project. The text starts with the basic concepts of HDL, and covers the key topics such as data flow modeling, behavioral modeling, gate-level modeling, and advanced programming. Several comprehensive projects are included to show HDL in practical application, including examples of digital logic design, computer architecture, modern bioengineering, and simulation.

Features* Teaches both IEEE standardized languages: VHDL and Verilog* Provides numerous complete examples including simulation, digital logic design, computer architecture, and a few bioengineering topics* Covers key areas such as data flow modeling, behavioral modeling, transistor-level modeling, procedures, tasks, and functions* Includes review questions and exercises for each chapter* Includes a companion CD-ROM with all of the complete projects from the book

ON THE CD! (see Appendix C for more details)* CODE: Includes all of the full programs from the book* FIGURES: Includes all of the figures from the book by chapter

SYSTEM REQUIREMENTS: Windows NT, Windows 2000, or Windows XP; CD-ROM or DVD-ROM drive; keyboard and mouse, or other pointing device; HDL simulator for the examples. ... Read more

Customer Reviews (5)

good bilingual introduction
Since this is one of the very few bilingual HDL textbooks, I have adopted it for my graduate-level introductory HDL-based design class. The author has been extremely cordial and helpful in handling my questions and comments via email, and I really like the book's extensive use of examples. My biggest gripes are the failure to embrace several Verilog 2001 constructs and the lack of test bench discussion. (I always start my class with a simple test bench example, to show the students how to get up-and-running with HDLs. They are then strongly encouraged to test all of their homework or term project designs with extensive test benches.) I need to supplement the book's discussions of logic synthesis and design verification, but it is a readable, accessible text for the novice or for anyone who knows one HDL and wishes to learn the rudiments of the other one.

Good reference for translating vhdl to verilog or vice versa.
I expect that this is the only book in print with vhdl-93 and verilog-95 examples side by side. For this reason it is a good reference for anyone knowing vhdl or verilog and wishing to quickly learn the other language for synthesis. Appendix B is a good cross reference for the two description languages.

This book does not cover HDL simulation and there are no testbench examples. The synthesis coverage of both languages is shallow. However for a designer who already knows one language and needs to learn the other, this book is an good value. I would also suggest that the word "Programming" be stricken from the title in the next edition, because this is not what hardware description is about.

Doesn't go far enough in depth, not organized well
I bought this book to learn verilog, pretty much because it had decent reviews and it's fairly cheap compared to other Verilog books. Well, you get what you pay for. Although I admire the author's attempts to try and cover both HDL languages, I had 2 major problems with the book:

1. It doesn't go in depth enough - This book would have been fine totally dedicated to either Verilog or VHDL, but it tries to cover both and doesn't cover the advanced details a professional or advanced grad student would need. It is a good primer for undergrads at best.

2. Minor flaw, but I didn't like how the book is organized. Like I said in point #1, if the book was either Verilog or VHDL it may have been sufficient. The author organizes the book so that a topic is covered for Verilog, then VHDL...then the next topic is covered in Verilog and then VHDL. I would have preferred if the first half of the book covered verilog, then the second half covered VHDL. If somebody is trying to learn Verilog like myself, I don't have to read a chapter, skip the next chapter, then read the next chapter...and so on and so forth.

The master teacher of HDL fundamentals
Nazeih M. Botros' HDL PROGRAMMING FUNDAMENTALS: VHDL AND VERILOG includes a cd of code for all the full programs from the book plus detailed in-depth descriptions of ASIC and FPGAs, as well as an overview of CAD tools. HDL is a CAD tool which offers designers a more efficient way for synthesizing chip designs, and this book is the master teacher of HDL fundamentals, covering both IEEE standardized languages VHDL and Verilog. Highly recommended for advanced students.

Automating Integrated Circuit Design
The design of semiconductors has become highly automated as the devices have gotten so complex that designing them by manual means is all but impossible. To assist in the design, the Hardware Definition Language (HDL)and the Very High-Speed Integrated Circuit (VHSIC) Hardware Definition Language (VHDL) were developed. They have become critical tools that the circuit designer must know and understand.

This book is intended to give the undergraduate student a solid background in the use of the software and it's place in the design phase for integrated circuits. It is suitable for any hardware oriented student in electrical engineering, computer engineering, or computer science where an emphasis on integrated circuit design is present. The book presumes no particular background, but some understanding of basic logic and modern algebra will be a help.

A CD included with the book that contains all the examples, code samples and figures. ... Read more

Product Description
With this book, you can:

- Start writing synthesizable Verilog models quickly.

- See what constructs are supported for synthesis and how these map tohardware so that you can get the desired logic.

- Learn techniques to help avoid having functional mismatches.

- Immediately start using many of the models for commonly used hardwareelements described for your own use or modify these for your ownapplication. ... Read more

Customer Reviews (7)

Aging
The 1998 copyright date is at least six Moore generations ago, as of this writing. CAD tools, and synthesis in particualar, have advanced hugely since then, so much of Bhasker's advice simply isn't needed any more - compilers have gotten lots smarter about common subexpressions, for example, so things like manually factoring them out won't have nearly the impact today that they did then.

Also, for some reason, Bhasker seemed to assume only synthesis straight to silicon when, even then, FPGAs were a significant part of the logic market. In the decade since, synthesis for FPGAs has become the dominant model. That means that synthesis tools need to infer uses of block RAMs, hard multipliers, and other special functions from the HDL code, things outside of Bhasker's discussion. The biggest problem might be timing - it just never gets mentioned, even though it's a major headache in most non-trivial designs.

Perhaps, in its day, thie offered a reasonable introduction for the digital ASIC designer. That day passed, and this just doesn't meet the needs of most current logic implementors.

-- wiredweird

Useful for Learning Verilog which can be Synthesized
I used the book with the XILINX version of ModelSim, a Verilog Simulator.
My goal was to be able to generate synthsizable Verilog without a lot of experimentation.
The style is by example. It is a good source of useful Verilog coding.
It is assumed you have some background in Verilog.
The book could use some tables on logic operators.
I think people who want to learn and use Verilog for synthesizable designs would benifit from having this book close at hand. It could be a really useful text for college students.

This is a very good (and short) book on Verilog synthesis
The author does a very good job of covering synthesizable Verilog.The numerous examples provide the reader with solid Verilog coding style guidelines.In addition, the author's discussion of blocking and non-blocking assignment statements for synthesizing combinational and sequential logic is very clear and concise.The only complaint I have about the book is its weak treatment of parameterizable design for synthesis. Despite the drawback, this is a very good reference and coding style guide for writing synthesizable Verilog.

A Synthesis Book...At Last
I write this review for two books: Verilog HDL Primer and Verilog HDL "SYNTEHSIS" Primer. Both books are primers, but serve the title very well. The books are straight to the point and do not "ramble" with grammar (ie. he tells you what it is you need to know and does not attempt to distract you). This is the book I use when I look for Verilog contructs for synthesis. The examples resemble closer to real world application including techniques in modeling digital systems. No comparison to the "other" Verilog text (Palnitkar). These two books complement one another. Another good verilog book is by Sternheim, but it is relatively expensive and hard to get.

Best Verilog Synthsis book
This is the best book about the Verilog Synthesis.The book is very practical, and I immediately applied many examples into my work.... ... Read more

Product Description
Covering the 6th International Verilog HDL Conference, this text includes such topics as: design verification; synthesis techniques; EDA technology; peripheral developments; and tools and technology. ... Read more

Product Description
Technology or Compiler Technology Directions;Language Issues; Silicon Centric RTL; System Level Design;Customizing the Simulation Environment;Legacy and Reuse;Verification/Validation/Testbench Strategies;Test, Timing, and Tools; Computer Hardware/Design and Test ... Read more

Product Description
(Pearson Education) A text for students and professionals, taking readers from the first principles of hardware specification design, beyond simple design language constructs in simulation to tackle specific issues. Particular emphasis is placed on the economy of specification writing and on writing styles. DLC: Field programmable gate arrays--Computer-aided design. ... Read more

Customer Reviews (5)

Wrong and misleading book
This is the worst book ever to use as a textbook for teaching Verilog. I was very happy learning the book because it's thin and used the knowledge to design digital systems. But as I spend more time doing design, I find MORE bugs and glitches based on the knowledge I learn from this book. It's a book that you MUST AVOID using because I believe the authors themselves probably didn't even design a single working ASIC chip. Few proofs of my complains include: 1) The authors are confused between using blocking and nonblocking assign (=, <=). As an expert in program and a hardcore CS student, I thought these would be the same until much later I do more digital design and DEBUGGING tons of problems. The authors actually used <= or nonblocking assignment in combinational blocks. 2) Finite state machines are horrible. They'll teach you the WRONG thing. For example, one-hot encoding makes absolute no sense when you use the whole N-bits for comparison in the case statement instead of just ONE-bit (on page 114). The authors said classical two always blocks in FSM are not good and encouraged one always block using implicit state machines. Believe you'll run into nightmare of debugging those waveforms in your digital design if you follow their philosophy. Not only this book is bad but it teaches the wrong thing, the wrong way of design digital system. If you want destroy a project, then you must buy this book to design a broken digital system. I recommend reading free stuff from sunburst design Cliff Cummings to unlearn these wrongful things. A horrible horrible book that wasted so much of my time in designing and debugging. It wasted muchmore $$ (thousands of dollars for bad design chip) than the $65 I paid for the book.

Excellent book
This book very concisely explains how to synthesizable verilog code. A beginner with no idea of HDL concepts might get overwhelmed. I would recommend beginners to start with Verilog HDL by Samir Palnitkar and then move on to this book.

Definitely a must have.

Very vague and broad
I was very excited when I saw this book hoping it'd open me all of the secrets of not-known-until-now world of HDL Synthesis.How wrong I was.The title is very misleading, the book spends just a few pages on synthesis.Overall, this book might be useful for a novice, but even for me, an undergrad ECE major, it turned out to be almost useless.It contains minimum of factual information, often outdated(and this is critical in the ECE world), and only slightly touches the surface on a number of topics it tries to cover.I think the authors whould have concentrated on something specific, instead of giving "what happened in Computer Engineering in last 15 years" review.

Excellent Treatment of Verilog and PLD Methodology
I have been a user of VHDL for the last three years and am now beginning to use Verilog, mostly because I am now doing ASIC development. For the new Verilog user, this book isexcellent because it covers the gamut for an HDL and FPGA designer -- the syntax of the language,the differencebetween structural and behavioral constructs, simulation, hierarchical design, and of course the ubiqituous State Machine. Also included are some sections on targeting different types oftechnology, including standard cell. I found this book quite useful compared to other Verilog books I have purchased.

One of the Best Verilog books to learn from
I have been searching for an Verilog book that will allow me to get up to speed quickly for an particular project. I wanted something that presentedthe syntax of the language in an clear manner but more importantly wouldgive me an methodology to allow me to use Verilog in the design of an FPGA.This book seems to have "the right stuff". This book along with"Verilog HDL" by Samir Palnitkar seem to be the best that I haveseen for learning Verilog ... Read more

Product Description
McGraw-Hill Publishing with the cooperation of major EDA vendors has developed the first computer-based training course for the popular Verilog Hardware Description Language.This is a complete training and software package that includes everything that is needed for design with Verilog, from trainings to software and from simulation programs to synthesis tools.The core of this package is the Verilog Computer-Based Training program that is authored and compiled by Dr. Zainalabedin Navabi, an authority in HDLs and EDA tools and environments. In addition to this training program, the course package contains hundred's of worked examples and templates, language and software tutorials, and simulation and synthesis tools.The Verilog CBT is an interactive training program designed for all skill levels.The material is geared to students in computer and electrical engineering programs or to professional engineers.

Never before, so much tools and training programs have been offered for a fraction of what is usually paid for a 1-day course.

Verilog Computer-Based Training Course:

With the Verilog CBT you can learn Verilog at your own pace with this comprehensive, up-to-date, and powerful CD-ROM training course and save over 90% of the cost of online courses or single-day seminars.Start at the beginning with the development of Verilog code and the application of HDL-based tools in simulation, synthesis, and testing of digital systems--or jump in anywhere if you already know some of the material.This resource-loaded CD will be an indispensable reference for as long as you use Verilog--and for anyone currently working in this rapidly growing HDL.The CD includes synthesizable templates for common RT-level components and has complete Verilog code for interface devices and arithmetic units such as array multipliers, pipeline dividers and polynomials.The topic of test benches and test bench generation is completely covered in this CD.

Verilog Computer-Based Training Course CD-ROM features:
•Everything you need to learn Verilog, in an interactive environment
•Hundreds of worked examples and self-test problems from easy to complex
•Test bench for every example, test bench templates for complex circuits
•License for Mentor's industry leading Verilog simulation and synthesis tools
•Altera's complete PLD design tool including simulation and synthesis
•Mentor Graphic's ModelSim Verilog simulators that run all examples
•Mentor Graphic's LeonardoSpectrum synthesis tool
•Software tutorials, as well as tutorials for simulation and synthesis
•Quick access to the exact model, template, data, syntax, or grammar you need
•Hard-copy user's manual with detailed study guide
•Supporting web site with answers to all problems and simulations
•Projects at the end of each subject and quizzes at the end of topics

With your purchase you will get tools and programs:

This is more than just a training program.It contains all that a design engineer or a college student needs for learning Verilog and designing with this fastest growing HDL

Here is what is on the training CD:
•Verilog Computer-Based Training software
•Synthesis manuals and guidelines
•Tutorials for use of simulation and synthesis tools that are included on the CD
•Verilog programs and code templates for common designs and testbenches
•Extendable one-year license for Mentor's ModelSim simulator
•Extendable one-year license for Mentor's LeonardoSpectrum synthesis tool
•License for Altera's Quartus II design and PLD programming environment
•Student version of Aldec's Active HDL design and simulation environment
•Schematic capture and block diagram editors and simulators

Users of Verilog Computer-Based Training Course:

The course is designed for students and professional engineers at all levels.It is designed for each user's pace and skill level, from novice to advanced.The hard-copy user's manual shows how users with different skill levels can benefit from this course.

Who can use this training CD:
•Those who are new to large scale design and need HDL and design trainings and tools
•Design engineers requiring advanced synthesis and programming skills and Verilog design tools
•Modeling engineers requiring advanced Verilog programming techniques
•Software developers that need all the details of Verilog from timing specification to high-level modeling
•Students in Logic Design who need schematic capture tools and training in Verilog design and programming environments
•Students in Computer Architecture who need training in synthesizable Verilog and use of high-level simulation and synthesis tools
•Students in VLSI and Electronics who require the use of switch level modeling tools and timing simulation tools

Organization of Verilog Computer-Based Training:

The material is organized into different levels, called streams.Each stream targets a particular facet of working with the Verilog language, thereby allowing the user to "jump into" what they are immediately interested in.Streams are divided into flows in which Verilog circuits and coding styles are discussed.

Contents of the Verilog CBT training:
•Verilog in a Top-Down Design Environment, covering steps that are taken in a top-down design of a small processor
•Verilog from Switches to Systems: in a simple to complex fashion, it shows Verilog coding of circuits from switches to systems.It covers complex combinational circuits, sequential blocks, state machines and test benches
•Verilog Language Reference Manual, covers the standard Verilog language and shows point examples
•Verilog Synthesizable Circuit Templates: starts with simple synthesizable codes and describes coding styles for complex combinational and sequential circuit synthesis
•Verilog Formal Syntax Definition: a hyper-linked document shows the formal definition of the IEEE standard Verilog language
•Verilog Based Simulation and Synthesis: step-by-step getting-started tutorials discuss installation and use of all software programs that are included on the CD

Verilog Computer-Based Training Software:

The Verilog CBT software takes advantage of modern multi-media teaching techniques. It uses animations and sound for an effective teaching of a difficult subject. The material is organized and presented with hyperlinked information selection, animation sequences, and different ways of presenting the same information.

Features of the Verilog CBT software:
•Uses animations to illustrate design, simulation and synthesis topics
•Easy to use menus and ample help in each screen
•Search tool for examples and language topics
•Easy access to circuit diagrams, Verilog code, testbench and simulation runs
•Verilog codes of schematic symbols appear as code-tips when selected
•Bookmark tool marks a page or circuit to go back to
•Easy access to the electronic manual
•Step-by-step menu-driven directions form use of simulation and synthesis tools
•Hyperlinked language reference manual and Verilog syntax summary

Circuits:
Array multiplier; Associative memory; Asynchronous control; Bus arbiter; Carry look-ahead adders; Combinational UDPs; Controllers and state machines; Controller testing; Data path testing; Exhaustive testing; External file handling; FIFO queues; Fault tolerant adders; IEEE 1149.1; Iterative circuits; LFSR; LRU; MISR; Memory parts; Pipeline divider; Polynomial calculation; Registers and register files; Sequential UDPs; Shifters and counters; Stacks; System architectures; Switch level logic; Test benches; UART; Wired logic

Constructs:
Always statement; Assign statements; Assign and deassign; Blocking assignment; Case statement; Delay control; Display; Event control; Force and release; Fork and join; Function definition; Hierarchical names; If statement; Intra assignment delay; Memory; Net types; Non-blocking assignment; Parameters; Path delay; PLA modeling; Procedural blocks; Setup and hold check; Specify block; Strength modeling; System tasks; Task declaration; Timing check; Timing control; Trireg; Wait statement ... Read more

Customer Reviews (7)

Verilog Training (PH)
The class was useful for our jr engineer developing a demo system.

Very dissapointing
Since I work for Intel and support the HW and ASIC engineers who design CPLD, FPGAs, ASICs, etc. I decided to purchase this tutorial to get an understanding of the concepts needed for this specific field. I had high hopes for this course especially after reading some of the reviewer's comments.I must say I am deeply dissappointed I paid so much money for a tutorial that is filled with numerous errors.There are so many errors in Streams 2 and 3 that I worry about the other Streams.Streams 2 and 3 are supposed to supply you with the basics, however they are so flawed that many examples contradict themselves.As I stated I am new to this so as I was reading I came across many examples that build on the previous ones that just didn't make sense in terms of how the verilog code was written.I am lucky I work with top-notch ASIC engineers who have been very helpful in answering my questions.Without them I would be so lost in the course contents.These professionals have made known to me their disappointment in a Verilog tutorial that is so prone to inconsistencies and errors.If the basic building blocks to this course are abundant with errors then what does it mean about the rest of the course? As to the other reviewers who gave it 4 or more stars I have just one question for them ---what are you smoking? (because there is no way we can be talking about the same course).If they actually say they learned Verilog based on this course then I would be very wary of their basic understanding of the foundational concepts.In closing the author has not done a good job in reviewing the material content.He stated in his introductory comments his thanks to his team in reviewing the entire course.I pose to all of you that his team failed him miserably.I expect better from individuals who consider themselves experts in this field.

Dissapointing
The licenced tools that come with this cd-rom like leanordo specturm is not supported anymore by model, and also the modelsim.

There is no point in buying this cd-rom at this price only for the tutorial and examples, which you can get them online anyway for free.

I had a real bad experience with the publisher and the author who never replies to emails.

I was very dissapointed after getting this cd-rom and had to return it, still waiting for my money..!!

Grade: C+

Farzin Karimifrom LTX Corporation, San Jose, CA, USA
This is a very well done work. It includes a vast collection ofpractical examples in various fields of digital design, and is a handy and yetrich reference material for both Digital Hardware Engineers and students. The presentation of the material is creative, making the training process more pleasant.
Most importantly, the CD integrates all the necessary design tools in a single platform with the licensingsupports of industrial leading edge EDA vendors.
I believe Dr. Navabiandhis team's effort in providing apromising training package forVerilog lovers at different levels of experience, has been successful.

Great learning tool.
I have learned a lot about Verilog from the time I first received this training material. What made this package successful for me are both the presentation material and the software tools available for hands on practice. First of all, the package comes with simulation and synthesis tools from well-known software manufacturers. You get to install your own choices of simulation tools, and if you are not sure which software to install, there are suggestions from the manual. However, some software do have a one year expiration date and they require a network card. Also, make sure your network card is plugged into the network hub, otherwise, the software could not detect the NIC ID. Other than that, the software installation went smoothly for me and was able to get up to speed in utilizing the software tools with some cursory material which is presented as part of the lesson plan.
The presentation material is didactic and the instructions are easy to follow. There are a plethora of circuits examples, and each circuit example is always accompanied by a logic diagram or block, the Verilog code that describe the logic diagram and the testbench that simulates the end result of the logic diagram described. At the end of every sequence, there will be a project given and it is totally optional to the user whether or not to take up the exercises. The answers to the projects are given and are posted under the author's website. Also, at the end of every stream, there are some short quizzes for further reinforcement to the subject discussed.
Overall, I find this package to be really useful and effective in learning the Verilog design and its unequivocal that Dr. Navabi and his team has done a great job in putting this package together for those of us who are interested in learning the Verilog design language. ... Read more

Product Description
Stresses the practical design perspective of Verilog rather than emphasizing only the language aspects. The information presented is fully compliant with the upcoming IEEE 1364 Verilog HDL standard. CD ROM included. ... Read more

Customer Reviews (28)

Good book
This is a very good book for studying VHDL. Easy to follow with lot of examples.

Good for starters, for the most part
I've used this book for four weeks now and it does a good job with the basics but it often say don't mind this part we'll explain it later.The index isn't very good when you just want to know where in the book something is.With that said, good beginners school book, but OK reference book.

Not a good reference book
As a first book on Verilog this is not a good book. I could not find any thing I was looking for in the index. There is only about a quarter of a page on memories and only a four line example. Most of the examples were poor and incomplete. This book is not for beginners. I found about four otherbooks that were good references, such as A Verilog HDL Primer, Third Edition by J. Bhasker and Verilog HDL: Digital Design and Modeling by Joseph Cavanagh. Both books have good examples and explanations. If your just starting out buy these two books and not Verilog HDL by Samir Palnitkar.

Surely there must be a better verilog book out there
Here are my complaints with the book:

1. Poor organization -- While it does contain a fairly complete description of Verilog, it's not a very useful description. Reading this book is like reading the Tax Act - all the information is there somewhere, but good luck trying to find it.

2. Poor index -- As a reference, this book is pretty much useless because it lacks a good index. Many items discussed in the book are _not_ in the index. So you can never find that thing that you vaguely remember reading about last month. And you cannot find the answer to a simple question quickly.

3. Lack of practical examples -- For a chip designer or verifier, this book is more or less useless. Although it claims to be "A Guide to Digital Design and Synthesis", there is only one brief chapter on synthesis, and it is severely lacking (a mere 40 pages out of 450). He doesn't even demonstrate how to code a flip-flop with an asynchronous reset. When it comes to practical usage, you're better off searching the web, or reading the source code for the openrisc processor, or something written by an experienced co-worker, or even just reading chapters 11 and 12 of "Application Specific Integrated Circuits" by Michael Smith (also available online I think).

4. Expensive -- I recommend you save your money and just use on-line resources to learn Verilog. None of these on-line resources are great, but at least you will be getting your money's worth, which is more than I can say about this book.

Awful reference source
I used this book to learn Verilog and if you read it from beginning to end, you might learn the gist of the language...but that's it.The book is virtually useless as any kind of reference source.The index is almost unusable (if you want to learn about the keywords "fork" or "join", for example, good luck.They aren't even listed in the index, along with just about everything else).Descriptions of how the language works are cryptic and overly brief, though the examples are sometimes helpful.

I seldom write reviews of books, but this one has annoyed me so much that I felt compelled to do so.

All in all, it's better than no book at all, but not much better. ... Read more

Product Description
Thomas and Moorby's The Verilog TM Hardware DescriptionLanguage has become the standard reference text for Verilog. The newly updated introduction presents the language through examplesillustrating the important styles of representation including:structural models, behavioral models of combinational and sequentialcircuits for logic synthesis, FSM-datapath models, and cycle-accuratedescriptions. A new chapter on behavioral synthesis presents the useof cycle-accurate descriptions with these tools. The Verilog TM Hardware Description Language, Fourth Editionis a valuable resource for engineers and students interested indescribing, simulating, and synthesizing digital systems. The book is ready for use in university courses. The order of coverageof representation styles matches typical introductory courses(structural, synthesizable, FSM-datapath, cycle-accurate). An appendixwith a tutorial workbook style is keyed into the introduction. Forarchitecture courses, modeling of simple pipelined processors ispresented. CD-ROM included! The book includes a CD-ROM containing the VeriwellTM Verilogsimulator, the Synplicity TM Synplify TM FPGAsynthesis software, examples from the book in text and PDF format, andlecture slides in PDF format. Usage of the synthesis tool istime-limited; directions for obtaining an extended license areprovided. The simulator and synthesis tools are available for severalplatforms. ... Read more

Customer Reviews (12)

Excellent Book, Watch out for Chinese Version which Sucks!! Beware.
I really liked the book since I had read a copy from my school library hence I decided to purchase one. Unfortunately since Amazon doesn't set any standards that all sellers should meet, my purchase was a rip off.

I order the book assuming it was a North American Copy Unfortunately The one that I received was printed in CHINA & FULL OF GRAMMATICAL MISTAKES please watch out for the seller "Express_Textbook" do not purchase unless u want a Chinese Version.

The seller does not specify this information so once you have made a transactionyou'd have to go through the hassle of returning it.

A NOTE TO AMAZON ADMIN: PLEASE INSIST SELLERS WHEN SELLING NEW PRODUCTS TO SPECIFY DETAILS SO THAT CUSTOMERS CAN MAKE THE RIGHT CHOICE.

Very good
'The Verilog Hardware Description Language' is a very good tutorial and reference for intermediate designers.
I used this book in an upper level hardware design course. The course had a beginning Verilog course as a prerequisite. I hadn't taken that course but I had experience in digital design and VHDL. This book got me up to speed quickly with it's many examples and tight explanations of the Verilog Language.
Some pluses:
-Example designs are short, complete, and simulatable. Most are even synthesizable. This is good because an example can be quickly understood in its entirety. You don't need to flip through and stare and multiple pages to get an idea of what's going on. If you insist on having them, there are two long, practical examples towards the end of the book.
-The text is very well written. Similar in style to 'The C Programming Language by Kernighan and Ritchie.'
-Verilog 2001: Focuses on 2001, which is a little clearer than previous standards. I think all tools support 2001 by default now so that should be used.

Some minuses:
-Too expensive.
-Not enough discussion on how Verilog constructs are compiled and netlisted. This is critically important in FPGA/ASIC design. However, this book is not any worse than other HDL books in this respect. It's just so important, I really haven't seen anything that gives the topic the treatment it deserves.

Possible minus:
-Not really for beginners. This is not a hardware design text.

I haven't used the CD that came with the book so I can't comment on that. My guess is anything on that CD is not as good as industry standard tools like Mentor's ModelSim.
Overall a very impressive book that will get you to productivity quickly in a Verilog project.

Could be great book, but shows too many deficiencies
This book should be used only by the experienced users that can filter out problematic sections.
Major problems:
- first chapter, "recommended" by authors for university courses, is extremely chaotic (begin..end blocks are called loops, exercises ask you to use loops before introducing them, etc.)
- cover of the latest edition claims coverage of the latest Verilog standard - unfortunately it is very poor coverage: new interesting features such as libraries and configurations are not mentioned at all!
- I had to work hard during many trainings to correct bad coding styles showing in students reading this book as their first Verilog publication
- the book is grossly overpriced...

Main advantage:
- good set of examples

Read This First Before Coding in Verilog
The claim that this book has become the standard for learning Verilog is true.
I use Verilog a lot but I still wish I had read this book before writing Verilog codes.

Had to have my own copy
Was sharing this book with my workmate. Found it pretty useful. I think its a great reference book to have.
It has
+ A great Index.
+ Good examples.
+ Been written by the masters of Verilog.
- A lot of words (ie some people might find it very 'wordy')

Every ASIC/FPGA designer I know has this one in there shelf. So go for it. ... Read more

Product Description
Conference held February 26-29, 1996 in Santa Clara, California. Paper. ... Read more

Product Description
For undergraduate courses in Advanced Digital Logic and Advanced Digital Design in departments of electrical engineering, computer engineering, and computer science. Introducing the Verilog HDL in a brief format, this text presents a selected set of the changes the popular hardware underwent in its first revision--emerging as IEEE Std 1364-2001 or Verilog-2001. It addresses the main features that support the design of combinational and sequential logic, and emphasizes synthesizable models, with a limited discussion of the theoretical framework for synthesis. ... Read more

Customer Reviews (3)

What a waste!
Just received my copy. There's no inclusion of the additional commands in file I/O from Verilog 2001. There's no $fscanf, no $fgets. No always @(*) explanation. If you're looking for Verilog 2001 stuff, look elsewhere.

Excellent introduction and reference
I purchased this with the hope of reinforcing my existing Verilog knowledge as well as familiarizing myself with new language features added in Verilog 2001.

What I found in the book was a fairly well-written, concise, introduction to the language. Furthermore, Verilog 2001 features were mentioned as appropriate. The examples are diverse and exhaustive, making this a perfect reference guide for people who learn best by example. Also, appendices provide invaluable reference materials for language features and primitives. Finally, Prof. Ciletti does an excellent job of mentioning practical synthesis considerations in designs, as well as suggesting coding styles as opposed to mandating a specific style.

I feel this book is an excellent value for the price, and I've placed in my reference bookshelf for digital design.

an excellent introduction to verilog
I liken this book to Kernighan and Ritchie's "The C Programming Language" in that it seems very concise, self-contained, well-written, with helpful appendices that will answer most advanced questions about verilog. The comparison is fitting since verilog is based on the C language. The aforementioned book on C is really the only text reference on the subject that I've used in the past five years, and I imagine verilog 2001 will play a similar role as I continue using verilog to design hardware. ... Read more

Product Description
Introduction to Logic Synthesis Using Verilog HDL explains how to write accurate Verilog descriptions of digital systems that can be synthesized into digital system netlists with desirable characteristics. The book contains numerous Verilog examples that begin with simple combinational networks and progress to synchronous sequential logic systems. Common pitfalls in the development of synthesizable Verilog HDL are also discussed along with methods for avoiding them. The target audience is anyone with a basic understanding of digital logic principles who wishes to learn how to model digital systems in the Verilog HDL in a manner that also allows for automatic synthesis. A wide range of readers, from hobbyists and undergraduate students to seasoned professionals, will find this a compelling and approachable work. The book provides concise coverage of the material and includes many examples, enabling readers to quickly generate high-quality synthesizable Verilog models. ... Read more

Customer Reviews (1)

Easy-to-read!
This is an easy-to-read book on logic synthesis using Verilog. The material contained provides an introductory level to logic design and synthesis.It includes a set of Verilog synthesizable examples on combinational and sequential logic circuits with straightforward comments and explanations.This 75-page book will surely speed up the learning of Hardware Description Language (HDL) based design of logic circuits using Field Programmable Gate Arrays(FPGA) or Application Specific Integrated Circuits(ASIC). However, I think that the schematics and the associated codes may need to be little bit more refined. They look as if they were composed using another source.Surely, the book is a good addition to the libraries of computer or electronics engineering students and practicing professionals. ... Read more

Product Description
This book organizes Verilog routines according tofunctionality, making it easy to locate the material you need. Eachfunction is described by a behavioral model to use for simulation,followed by the RTL code you'll use to synthesize the gate-levelimplementation. Extensive test code is included for each function, toassist you with your own verification efforts. The CD-ROM includes allof the Verilog code from the book, plus FPGA Express synthesissoftware from Synopsys and SILOS III simulation software from Simucad. ... Read more

Customer Reviews (16)

This book and examples were very useful in improving my Verilog skills
This book was the ideal book for my needs. I found the explanations and code examples to be complete for writing Verilog.I have used as an ongoing reference over several years and many employment positions.

Excellent resource for designers.
The book covers synthesis and design issues with clarity and concise explanations for each case.There isn't any extra fluff to get in the way of going from concept-to-synthesis for each topic presented.

Excellent book on verilog
Bob's "Verilog Designer's Library" is an excellent book for
verilog programmers. It does help me much.Every example in
this book is very practical to engineers. I like it.

Some Good Points
This book is good for beginners, it has a few good ideas in it.The Behavioral vs. RTL versions of the code is pretty useless, but the RTL vs. Simulation versions are useful.Getting a quick and dirty unit test bench up and running is a good idea.But DO NOT USE THE ASYNCHRONOUS FIFO.It does not work.If you are crossing clock boundaries, this is not the way to do it!

The reviews about Verilog Designer's Library
This bookreviews the the Verilog Coding Technique in part one. It introduces the Genearl Coding, Behavioral Coding, and RTL coding technique. It makes reader understand how important the coding technique is. This book also explains synthesis issue and simulation issue. After these chapters introduction, the basic building block, state machines, some complex functions, error dection and correction, memory controller Verilog behaviour code and RTL code are introduced in further chapter. This book is for whom has a basic familiarity with Verilog language. It is very useful and valuable for hardware designer,hardwaresystem engineer and student. ... Read more

Product Description

Verilog aims to introduce new users to the language of Verilog with instruction on how to write hardware descriptions in Verilog in a style that can be synthesized by readily available synthesis tools. Offers clear exposition of the Verilog hardware description language. This book is written in a style that allows the user who has no previous background with hardwaredescription languages (HDLs) to become skillful with the language.Features treatment of synthesis-friendly descriptive styles.An excellent book for self-study, reference, seminars, and workshops on the subject.

Customer Reviews (11)

Awful, Impractical, Unreadable
Do not buy this book.

Of course, it is out of date. That is not the author's fault, as it was published before Verilog 2001. Everything else *is* his fault, however.

This book does not present material in an order that is useful for learning the language. It is not skimmable. It is not easy to just "look something up." Useful information, if there is any, is buried deeply in meaningless exposition. The emphasis placed on the material does not correspond with any design methodology I am familiar with.

This book says a log about nothing. Read Sections 8.1 - 8.5, for instance, including such material as "Benefits of Synthesis". Design is about synthesis. Synthesis is the whole *point*.

This book uses blocking assignments in sequential logic. It uses nonblocking assignments in combinational logic. This is not just bad style. It is dangerous advice (especially in the former case)

Examples in this book are so simple as to be trivial. Examples should be edifying, not obvious.

Having been through this book far too many times, now, I am *still* left with no clear idea who it was written for. It is clearly not a practical book for someone looking to pick up Verilog quickly. It certainly has *nothing* to do with rapid prototyping, despite the title. It does not clarify anything that couldn't be more easily gleaned from the Verilog Standard itself.

In short, I'm sorry I ever bought this book. It has wasted more of my time than it has ever saved. Instructors: AVOID using this book in your courses, please. Designers, pick somthing else.

Good Book
This book is not the a quick start verilog book. It is a comprehensive verilog bible kind of a book and hence a good reference. There are explanations for everything from syntax, usage, to pitfalls and subtleties. If you are going to buy only one book and intend to learn verilog seriously I would recommend this book. If you are just tinkering with verilog however and want to experiment only for a while, you should consider one of the "learn verilog in 24 hours" or quick start verilog books.

Text for grad engineering class
First printing has some different problem numbers from other printings.Check the printing number against class requirements.

Recommended.
I am using this book for an introductory Verilog class at my University and I must say I am truely confused by some of the reviews here. Although this book takes the reader through the most basic elements of the Verilog language, to its more complex and esoteric uses, most people here complain that the it fails to provide the advanced, cutting-edge examples they feel it should have. What? Do you really expect to learn how to build a Pentium IV from a book teaching the basics of Verilog? Get real!

This book teaches the basics, it teaches you how to use the Verilog language by providing examples that, although dated, illustrate timeless approaches that are used in every Verilog design large or small. If you can't find how to complement a variable, then its your fault, not the book; I can assure you its there. Furthermore, if you think that pointing out a few mistakes in the book, (and have obviously learnt the correct way of doing it from it), makes it rubbish, then I'm afraid there won't be any books that will fully satisfy your needs.

This is one of the best books I've encountered on the Verilog langauge. Although I wouldn't say it's as good as, say, Ashendens VHDL, it is _not_ as bad as some of the reviews here make out. Recommended!

Writing is far from refined
The writing is fragmented and incomplete statements are often seen, for example:

1. in section 4.6.4, it is written
"If A and B are vectors, A&&B returns true if both words are
positive integers." then no words there to specify "otherwise" part. If you assume otherwise A&&B returns false, you are wrong,
since A&&B returns true when both are negative integers too.

2. In 7.5.1, it says "There are two forms for delay control,...
The first form is ...", but the second form is never explained or mentioned there.

3. You often see
always @ ( a or b ) in examples with "or" in boldface,
but I could not find where "or" is defined. Even though I
understand its meaning, I wish to tell the differece from
using "|" , "||"

4. ... plus many typos

These cause a lot confusion in reading ... Read more

Product Description
Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. The remainder of the book demonstrates how both behavioral and structural models can be developed and intermingled in Verilog. ... Read more

Customer Reviews (2)

do not waste your money
The author claims that he covered in this book what other test books failed to do. He claims that this book can be used to design a processor from start to finish. Unfortunately I bought this book and was hoping to find a detailed explanation on how to design a mini processor.After reviewing the book, I concluded that this book is a waste of money and time. For example, the book talks too much about verilog basics but did not provide a block diagram or a top level for the VeSPA processor which is used in the book. For the money I paid I was expecting to find a useful example of a mini processor design.

Too incomplete.
Unfortunately, this book is more of an overview book. Don't expect to get any of the subjects presented fully explained. Some of the really important topics (like hazard detection) are only briefly mentioned. For the price it should have been at least twice as big and much more detailed. ... Read more

Product Description
For introductory-level courses in Verilog Hardware Description Language. Written by the co-developer of the Verilog Implicit To One hot (VITO) preprocessor, this text introduces the industry standard Verilog Hardware Description Language as a new way to explore enduring concepts in digital and computer design, such as pipelining. It shows how Verilog simulation is a tool for uncovering bugs prior to hardware fabrication, and how Verilog synthesis is a tool for automatically converting source code into hardware. Ideal for designers new to Verilog, it features a consistent design framework using ASM charts, and contains many realistic, practical examples. ... Read more

Customer Reviews (6)

ASM and Verilog is a bad mix.
The author obviously is trying to force Verilog and ASM notation into the same book. The result is the implicit use of Verilog states which in effect results in unmanagable Verilog spaghetti code. Having a background in both hardware design and software consulting the Verilog code in the book is terrible. It can be compared to a jumble of assembly language without any comments of structure - sure, if you know the background of the design (i.e. the ASM charts) you might see why the code might work but the Verilog code by itself is not readable!

If you do some research you'll quickly see that ASM charts are not widely used these days. Most engineers in the industry are using well defined moore state machines because they are easy to understand and maps very well to case statements in Verilog.

I will now skim through the rest of the book to see if there might be some content NOT related to ASM charts that might be worth picking up...

Gets you off to a running start
I got this book as a quick tutorial on the Verilog language. After just a day or two with this book and a compiler to play with, I had the level of skill that I wanted. The Verilog language description is just one chapter in this book, though, and not even the longest one.

This is lots more than just a language book. It also shows a higher level of design than most students see in their first few logic courses. The example developed in the book's later sections works up to a supersclar ARM processor core! This book is not about hooking up a few gates and latches. It actually starts to address problems of practical size and complexity. Big problems really are different from small ones, and I was very happy to see techniques for the larger systems.

That said, beginning logic designers may find the book frustrating. It works at a high conceptual level and fast pace. The author assumes that the reader already has good command of the basics of boolean logic, synchronous design, and computer architecture.

Initially, I just wanted a competent language description. I got that, plus some worthwhile design technique. Best of all, I did not have to sit through yet another lesson in the baby steps of logic design.

enlightening!
this book is an insightful and exciting introduction to hardware
design, especially to those like me with a software background.
the author illuminates the difference between hardware and
software specification, and demonstrates how his "implicit"
(RTL) approach works well for (synthesis of) pipelined CPU designs.
the only deficit is that some of the free tools listed in the
appendix are no longer available.

Not a great first book on Verilog
Although the book does cover most of the basics in Verilog, its terrible organization of Verilog topics renders the book almost useless as a good reference to the Verilog language. Stick with Palnitkar's book for this purpose. As far as I have seen the author's implicit style of Verilog code is not recommended in the industry, nor could I find any compelling reason why it should be. The author's use of ASMs is very good and a useful tool when mastered. The information regarding computer design is solid but having a copy of the classics by Hennessy and Patterson nearby is always useful. I would recommend this book to the Verilog designer that is interested in computer design but not as a first book on either topic.

Not a good first Verilog book.
Although the book does cover most of the basics in Verilog, its terrible organization of Verilog topics renders the book almost useless as a good reference to the Verilog language.Stick with Palnitkar's book for this purpose. As far as I have seen the author's implicit style of Verilog code is not recommended in the industry, nor could I find any compelling reason why it should be. The author's use of ASMs is very good and a useful tool when mastered. The information regarding computer design is solid but having a copy of the classics by Hennessy and Patterson nearby is always useful. I would recommend this book to the Verilog designer that is interested in computer design but not as a first book on either topic. ... Read more

Product Description
Emphasizing the detailed design of various Verilog projects, Verilog HDL: Digital Design and Modeling offers students a firm foundation on the subject matter. The textbook presents the complete Verilog language by describing different modeling constructs supported by Verilog and by providing numerous design examples and problems in each chapter. Examples include counters of different moduli, half adders, full adders, a carry lookahead adder, array multipliers, different types of Moore and Mealy machines, and much more. The text also contains information on synchronous and asynchronous sequential machines, including pulse-mode asynchronous sequential machines.

In addition, it provides descriptions of the design module, the test bench module, the outputs obtained from the simulator, and the waveforms obtained from the simulator illustrating the complete functional operation of the design. Where applicable, a detailed review of the topic's theory is presented together with logic design principles, including state diagrams, Karnaugh maps, equations, and the logic diagram.

Verilog HDL: Digital Design and Modeling is a comprehensive, self-contained, and inclusive textbook that carries all designs through to completion, preparing students to thoroughly understand this popular hardware description language. ... Read more

Customer Reviews (16)

Design and Modeling
I am a graduate student in Computer Engineering taking a course in Verilog. We have ten labs to do: combinational logic, sequential logic, adders, counters, multipliers, ALUs, etc. This book has helped considerably by describing the theory, concepts, and procedures to be used when designing the labs using Verilog. It is a great book to augment the lectures. Well written and easy to understand.

Verilog:Digital Design
One of the best books written on Verilog, which covers this HDL in depth. Very easy to read and comprehend with numerous design examples. The examples include traditional design techniques, complete with appropriate theory, then modeled using Verilog. Emphasis focuses on the thorough design of the various projects which help the reader comprehend this widely-used HDL. The author includes the state diagrams for Moore and Mealy machine designs together with the logic diagrams which provide a one-to-one correspondence with the Verilog code. Another nice feature is the inclusion of instantiation names and net names in the logic diagrams providing an additional link to the Verilog code. A comprehensive and ideal book for logic design for both combinational logic and sequential logic.

Digital Design and Modeling
An excellent book from which to learn Verilog HDL. The language is comprehensively covered with numerous examples. All of the modeling constructs are presented in detail together with many examples using each modeling technique. The key words in the Verilog code bold faced, making the code easy to follow. The author presents the theory of each topic before designing the machines in Verilog. Examples include combinational and sequential logic design for adders, multipliers, counters, error detection and correction, and ALUs, as well as the complete design of a pipelined RISC processor. An ideal book to learn not only Verilog, but also logic design.

VERILOG HDL: DIGITAL DESIGN and MODELING
An excellent book that describes the various modeling techniques used in Verilog: dataflow modeling, behavioral modeling, and structural modeling, including built-in primitives and user-defined primitives. There are numerous examples in each chapter in which the author presents the traditional design techniques followed by the Verilog designs. The Verilog design examples include: iterative networks, adders and subtractors, code converters, counters of various moduli, multipliers, and finite-state machines. The Hamming EDC code and the Booth multiply algorithm are also covered. Behavioral modeling includes the case statement and the various loop statements. The examples consist of the Verilog design, the test bench, the outputs, and the waveforms, which most books do not include. The Verilog code is formatted so that it is easy to read and understand. The event queue used by the simulator is also presented. A good book from which to learn Verilog.

VERILOG HDL: Digital Design and Modeling
A good book to learn this popular HDL.It covers all of the modeling techniques: built-in primitives, user-defined primitives, dataflow modeling, behavioral modeling, and structural modeling.There are numerous examples that are designed using Verilog.These include a counter-shifter, synchronous and asynchronous finite-state machines, one-hot machines, a BCD adder/subtractor, a pipelined RISC processor, and many others.An appendix contains the answers to many problems that are given as exercises.The author also shows the test benches, outputs, and waveforms for the various examples using the SILOS Simulation Environment software.

... Read more

Product Description
This rigorous text shows electronics designers and students how to deploy Verilog in sophisticated digital systems design.The Second Edition is completely updated -- along with the many worked examples -- for Verilog 2001, new synthesis standards and coverage of the new OVI verification library. ... Read more

Customer Reviews (22)

Good intro book
I found this book to be very helpful over other books.I like the style of writing.It was easy for me to read and understand than a other books I have read on the subject.The examples are also meaningful and relavent for new users.I found other books to be too abstract, or go into too much detail on topics that are not useful for new users. I would give it 5 stars, but I agree with others that the book isn't very good for reference.

Verilog
Cheep and very good introduction into Verilog.I'm currently using this book very heavily.I look at the examples very heavily, but haven't really read it strait through.I jump all over the place depending on what my implementation requires.

learn testbenching!
Verilog is probably the most common package for modelling digital circuits. Navabi provides detailed instructions on how to use it for many types of circuits. We see how Verilog can provide different levels of modelling. From the Register Transfer Level to doing higher level synthesis. This lets you simulate either a small circuit, to great depth, or to scale to much larger sets of transistors.

The testbenching ability of Verilog is emphasised. Vital in checking the validity of performance of your circuits, before you tape out to silicon. One of Verilog's strengths is how its testbenching can save you time and money. Provided you take full advantage of it.

Excellent Book for Beginners
This is an excellent book for beginners. I especially like how the examples are organized. It starts with the basic ones and ends with a complete working CPU. The later examples use the earlier ones as basic modules, which is very helpful for beginners.

The materials included in the CD are very useful with the exception of the software, which is outdated now. Hope the latest software will be included in the CD with the new edition of the book.

Very good learning materials
This book contains many useful examples of real design applications with various coding styles. It is a very good reference for the students who start to learn Verilog for the first time. It describes from structural to behavioral level design with emphasis on synthesizable codes. Students can learn not only the verilog language itself but also the hardware system design concepts and flow. The CPU design chapter is a very excellent example of showing how to approach a complex design task step by step. ... Read more

Product Description
The IEEE 1364-2001 standard, nicknamed `Verilog-2001', is thefirst major update to the Verilog language since its inception in1984. This book presents 45 significant enhancements contained inVerilog-2001 standard. A few of the new features described in thisbook are:+ANSI C style port declarations formodules, primitives, tasks and functions;+Automatic tasks andfunctions (re-entrant tasks and recursive functions);+ Multidimensional arrays of any data type, plus array bit and partselects;+Signed arithmetic extensions, including signed datatypes and sign casting;+Enhanced file I/O capabilities, such as&dollar;fscanf, &dollar;fread and much more;+Enhanced deepsubmicron timing accuracy and glitch detection;+Generate blocksfor creating multiple instances of modules and procedures;+ Configurations for true source file management within the Veriloglanguage.This book assumes that the reader is already familiar with usingVerilog. It supplements other excellent books on how to use theVerilog language, such as The Verilog Hardware DescriptionLanguage, by Donald Thomas and Philip Moorby (Kluwer AcademicPublishers, ISBN: 0-7923-8166-1) and Verilog Quickstart: APractical Guide to Simulation and Synthesis, by James Lee(Kluwer Academic Publishers, ISBN: 0-7923-8515-2). ... Read more

Customer Reviews (1)

Excellent overview and explanation of Verilog 2001
This book provides an excellent overview an explanation of the new Verilog 2001 features, the rationale for each new feature, and examples. ... Read more